The Operational Amplifiers

The operation amplifier:

An operational amplifier is a direct coupled high gain amplifier consisting of one or more differential (OPAMP) amplifiers and followed by a level translator and an output stage. An operational amplifier is available as a single integrated circuit package.

The block diagram of OPAMP is shown in fig. 1.

Fig. 1

The input stage is a dual input balanced output differential amplifier. This stage provides most of the voltage gain of the amplifier and also establishes the input resistance of the OPAMP.The intermediate stage of OPAMP is another differential amplifier which is driven by the output of the first stage. This is usually dual input unbalanced output.

Because direct coupling is used, the dc voltage level at the output of intermediate stage is well above ground potential. Therefore level shifting circuit is used to shift the dc level at the output downward to zero with respect to ground. The output stage is generally a push pull complementary amplifier. The output stage increases the output voltage swing and raises the current supplying capability of the OPAMP. It also provides low output resistance.

Level Translator: Because of the direct coupling the dc level at the emitter rises from stages to stage. This increase in dc level tends to shift the operating point of the succeeding stages and therefore limits the output voltage swing and may even distort the output signal. To shift the output dc level to zero, level translator circuits are used. An emitter follower with voltage divider is the simplest form of level translator as shown in fig. 2. Thus a dc voltage at the base of Q produces 0V dc at the output. It is decided by R1 and R2. Instead of voltage divider emitter follower either with diode current bias or current mirror bias as shown in fig. 3 may be used to get better results. In this case, level shifter, which is common collector amplifier, shifts the level by 0.7V. If this shift is not sufficient, the output may be taken at the junction of two resistors in the emitter leg.

Fig. 2

Fig. 3

Fig. 4, shows a complete OPAMP circuit having input different amplifiers with balanced output, intermediate stage with unbalanced output, level shifter and an output amplifier.

Fig. 4

Example-1:

For the cascaded differential amplifier shown in fig. 5, determine:

• The collector current and collector to emitter voltage for each transistor.
• The overall voltage gain.
• The input resistance.
• The output resistance.

Assume that for the transistors used h_FE = 100 and V_BE = 0.715V

Fig. 5

Solution:

(a). To determine the collector current and collector to emitter voltage of transistors Q₁ and Q₂, we assume that the inverting and non-inverting inputs are grounded. The collector currents (I_C ≈ I_E) in Q₁ and Q₂ are obtained as below:

That is, I_C1 = I_C2 =0.988 mA.

Now, we can calculate the voltage between collector and emitter for Q₁ and Q₂ using the collector current as follows:

V_C1 = V_CC = -R_C1 I_C1 = 10 – (2.2kΩ) (0.988 mA) = 7.83 V = V_C2

Since the voltage at the emitter of Q₁ and Q₂ is -0.715 V,

V_CE1 = V_CE2 = V_C1 -V_E1 = 7.83 + 0715 = 8.545 V

Next, we will determine the collector current in Q₃ and Q₄ by writing the Kirchhoff's voltage equation for the base emitter loop of the transistor Q₃:

V_CC – R_C2 I_C2 = V_BE3 - R'_E I_C3 - R_E2 (2 I_E3) + V_BE= 0
10 – (2.2kΩ) (0.988mA) - 0.715 - (100) (I_E3) – (30kΩ) I_E3 + 10=0
10 - 2.17 - 0.715 + 10 - (30.1kΩ) I_E3 = 0

Hence the voltage at the collector of Q₃ and Q₄ is

V_C3 = V_C4= V_CC – R_C3 I_C3 = 10 – (1.2kΩ) (0.569 mA)

        = 9.32 V

Therefore,

V_CE3 = V_VCE4 = V_C3 – V_E3 = 9.32 – 7.12 = 2.2 V

Thus, for Q₁ and Q₂:
              I_CQ = 0.988 mA
            V_CEQ = 8.545 V
and for Q₃ and Q₄:
             I_CQ = 0.569 mA
          V_CEQ = 2.2 V

[Note that the output terminal (V_C4) is at 9.32 V and not at zero volts.]

(b). First, we calculate the ac emitter resistance r'_e of each stage and then its voltage gain.

The first stage is a dual input, balanced output differential amplifier, therefore, its voltage gain is

Where

 R_i2 = input resistance of the second stage

The second stage is dual input, unbalanced output differential amplifier with swamping resistor R'_E, the voltage gain of which is

Hence the overall voltage gain is

A_d= (A_d1) (A_d2) = (80.78) (4.17) = 336.85

Thus we can obtain a higher voltage gain by cascading differential amplifier stages.

(c).The input resistance of the cascaded differential amplifier is the same as the input resistance of the first stage, that is

R_i = 2β_ac(r_e1) = (200) (25.3) = 5.06 kΩ

(d). The output resistance of the cascaded differential amplifier is the same as the output resistance of the last stage. Hence,

R_O = R_C = 1.2 kΩ

Example-2:

For the circuit show in fig. 6, it is given that β =100, V_BE =0715V. Determine

• The dc conditions for each state
• The overall voltage gain
• The maximum peak to peak output voltage swing.

Fig. 6

Solution:

(a). The base currents of transistors are neglected and V_BE drops of all transistors are assumed same.

From the dc equivalent circuit,

and

b) The overall voltage gain of the amplifier can be obtained as below:

Therefore, voltage gain of second stage

The input impedance of second stage is

The effective load resistance for first stage is

Therefore, the voltage gain of first stage is

The overall voltge gain is A_V = A_V1 A_V2

(c). The maximum peak to peak output votage swing = Vopp = 2 (V_C7 - V_E7)
                                                                                                = 2 x (5.52 - 3.325)
                                                                                                = 4.39 V