Design of Series Voltage Regulator

Design of Series Voltage Regulator:

Fig. 1 shows the basic circuit of a series voltage regulator. The operation of this regulator has been discussed in previous lecture. It consists of series (pass) transistor to control the output voltage.

Fig. 1

The circuit can be designed taking two extreme operating conditions,

1. V_{S max}, I_{Z max}, I _{load min} / β
2. V_{S min}, I_{Z min}, I _{load max} / β

We calculate R _s for both conditions and since R _si is constant, we equate these two expressions as in Equation E-1.

         (E-1)

A design guideline that set I_{Z min} = 0.1 I _{Z max}. Then we equate the expressions for Equation (E-1) to obtain,

      (E-2)

Solving for I_{Z max}, we obtain,

      (E-3)

We estimate the load resistance by taking the ratio of the minimum source voltage to the maximum load current. Since R _load is large and in parallel, it can be ignored. This is the worst case since it represents the smallest load and therefore the maximum load current.

      (E-4)

The output filter capacitor size can be estimated according to the permissible output voltage variation and ripple voltage frequency and is given by

       (E-5)

Since the voltage gain of an EF amplifier is unity, the output voltage of teh regulated power supply is,

V_load=V_Z - V_BE   (E-6)

The percent regulation of the power supply is given by

      (E-7)

Example –1 (Design)

Design an 11.3V regulated power supply shown in fig. 1 for a load current that varies between 400 mA and 500 mA. Assume an input of 120 V rms at 60 HZ into a 3:1 center - tapped transformer. Use a 12 V Zener with R_Z = 2Ω. The transistor has V_BE = 0.7 V and β = 100. Set C so Δv_s= 30%.

Solution:

The design consists of choosing the values for R_sand for C_F. First V_{S max} is obtained multiplying the rms voltage by √2.

V_{S max} = √2 x 120 = 170 V

The transformer output on either side of the center tap is one-sixth of the input, so V_{S max}is 28.3V.

Since Δv_s= 30%, Therefore,          V_{S min}= (0.7)(V_{S max}) = 30% Given that         I_{Load max} = 500 mA and                      I_{Load min}= 400 mA                          V_Z= 12 V

The maximum Zener current can be obtained from equation (E-3) derived in previous lecture,

Notice that the transistor keeps the value of I_{Z max} quite small since β appears in the denominator.

The source resistance R_S can be calculated from equation (E-1) of previous lecture,

Note that 

The capacitor size is estimated from equation (E-5) of previous lecture:

Equation (E-7) can be used to evaluate the percent of regulation at the load.

Example – 2:

For the circuit of fig. 2, determine the following:

1. Nominal output voltage
2. Value of R₁
3. Load current range
4. Maximum transistor power dissipation
5. Value of R_S and its power dissipation

The relevant information is as follows:

V_i = constant 8 V; D: 6.3 V, 200 mW; requires 5mA minimum current

Q: V_EB= 0.2 V,         h_FE = 49,             I_CBO≈ 0

Fig. 2

Solution:

a. The nominal output voltage is the sum of the transistor's V_EB and the Zener voltage:

V O = 0.2 + 6.3 = 6.5 V

b. R₁ must supply 5mA to the Zener:

c. The maximum allowable Zener current is

P / V =0.2 / 6.3 = 31.8 mA

The load current range is the difference between minimum and maximum current through the shunt path provided by the transistor. At junction A, we can write

I_B = I_Z – I₁;
I₁ is a constant 5 mA; therefore

I_B =I_Z – I₁ = (5 x 10^-3 ) – (5 x 10^-3) = 0
I_B =I_Z – I₁ = (31.8 x 10^-3) – (5 x 10^-3) = 26.8 mA

The transistor's emitter current is (h_FE + 1) (I_B). I_B ranges from a minimum of around zero to a maximum of 26.8 mA; therefore the load current range is (h_FE + 1) (26.8 x 10^-3) = 1.34 A. The Zener alone could provide a maximum range of 26.8mA.

d. The maximum transistor power dissipation occurs when the current is maximum. Using I_E ≈ I_C, we have

P_D = V_O I_Z = 6.5 (1.34) =8.7 W

e. R_S must pass 1.34 A to supply current to the transistor and R_L:

The power dissipated by R_S is

Series Regulators:

Voltage regulators may be classified as series regulators or shunt regulators. Improvements in performance of voltage regulators are possible using the series regulator. Fig. 3 shows a functional block diagram of the series type voltage regulator.

Fig. 3

The control element is a device which is in series with load and supply and its operating state adjusts as necessary to maintain a constant voltage V_o. A measuring circuit produces a feedback voltage proportional to V_o and this voltage is compared with a reference voltage. The output of the comparator circuit is the control signal that adjusts the operating state of the control element. If V_odecreases, due to increased in load, then the comparator produces a output that causes to control element to increase the output voltage.

The amplifier is of the differential input type; one input is V_s, while the other is V_r, a constant reference voltage. The reference may be a Zener diode or a dry cell. The amplifier output is proportional to the difference between its two inputs; this difference is called the error signal and may be expressed as follows:

e = V_S -V_r

The amplifier multiplies the error by a constant K, yielding an appropriate signal to the control element. The function of the signal is to increase or decrease the effective resistance of the control element, depending on whether V_O is too high or too low, respectively.

For example, if V_O should increase, the error voltage ‘e' also increases. The amplifier's output therefore increase; this causes the resistance of the control element to increase, therefore reducing the load current and load voltage. Note that the original increase in V_O caused the circuit to act in such a manner as to decrease V O . It is because of this negative feedback that we are able to achieve control over the load voltage.

A circuit that operates on the above principle is shown in fig. 4. R₃, R₄, and R₅ make up the sampling network. The current through the sampling network must be sufficiently large that, whatever current the base of Q₂ draws, the loading on the voltage divider is negligible and V_O remains an accurate sample to V_O.

Fig. 4

It is possible to simply eliminate R₃ and R₅ and leave only R₄, but there is the danger that in setting the potentiometer one will go to either extreme, in which case the transistor may be damaged. None of the transistor is critical; R₄ is variable to allow setting of the output voltage.

The sample voltage V_s is applied to the base of Q₂, while the reference voltage V_r, which is provided by Zener diode D₁, is applied to the emitter. R₂ sets the Zener current; in addition to ensuring that the Zener operates in the breakdown region, the Zener's temperature coefficient, which is both voltage- and current-dependent, may be controlled by an appropriate selection of current through R₂. This way the Zener's temperature coefficient (usually positive) may be used to cancel the transistor's V_BE temperature dependence (usually negative).

The error voltage is V_s -V_r, or simply V_BE. Q₂ yields an output current (I_C2) which is proportional to this “error”. At junction A the following expression may be written

I_C2 + I_B1 = I₁

If I₁ is constant, changes in I_C2 yield equal but opposite changes in I_B1; that is, if I_C2 rises, I_B1 drops. Changes in I_B1 are amplified by Q₁ to yield corresponding changes in I_E1 and I_O. As the current through it changes, Q₁ appears as a variable resistor whose resistance depends on the control current I_B1. If I_B1 drops, the resistance of Q₁ increases, allowing less current to flow through the load.

It is important to note that is type of corrective action is effective only as long as I₁ remains reasonably constant. This is to ensure that I_B1 changes mainly in response to variations in I_C2 (which are due to the error signal). If I₁ is not constant, it is possible for I_B1 (and hence I_O and V_O) to change in response to I₁ variations which do not reflect conditions in the load circuit.